1. Field of the Invention
This invention relates to methods of fabrication of microelectronic devices, and more particularly to methods for facilitating removal and stripping of photoresist layers employed in fabrication of microelectronics devices.
2. Description of Related Art
Microelectronics devices are formed from microelectronics substrates over which are formed patterned microelectronics conductor layers which are separated by microelectronics dielectric layers.
In the process of forming microelectronics devices and patterned microelectronics layers, such as but not limited to patterned microelectronics conductor layers, within microelectronics fabrications, it is common to employ patterned photoresist layers as mask layers for forming those microelectronics devices and patterned layers from previously deposited blanket layers.
While the use of patterned photoresist layers as mask layers when forming microelectronics devices and patterned layers from corresponding blanket layers within microelectronics devices is thus quite common in the art of microelectronics fabrication, the use of patterned photoresist layers as mask layers in a process of forming microelectronics devices and patterned layers from blanket layers within microelectronics devices is not without problems. Specifically, it is common in microelectronics fabrication for patterned photoresist layers which have been employed as mask layers for forming devices and patterned layers often to be particularly difficult to strip patterned photoresist from a microelectronics device or patterned microelectronics layer whose fabrication is facilitated employing the patterned photoresist layer. Typical microelectronics fabrication processes which provide patterned photoresist layers which are difficult to strip include but are not listed to reactive ion etch (RIE) plasma etch processes and ion implantation processes.
It is thus towards the goal of providing, within the art of microelectronics fabrication methods which facilitate stripping of patterned photoresist layers, and particularly methods which facilitate stripping of patterned photoresist layers which have been employed as mask layers for forming microelectronics devices and patterned microelectronics layers from corresponding blanket microelectronics layers within microelectronics devices, that the present invention is directed.
Various methods have been disclosed in the art of microelectronics fabrication for forming and stripping patterned photoresist layers which may be employed as mask layers for fabricating microelectronics devices and patterned microelectronics layers within microelectronics devices.
Commonly assigned, U.S. Pat. No. 5,840,203 of Chiang Jen peng for “In-Situ Bake Step in Plasma Ash Process to Prevent Corrosion” describes a modified dry etching or plasma ashing, method for removing photoresist residue which avoids corrosion of metal electrodes. Wafers are placed in a batch type plasma chamber wherein oxygen gas flows and an RF plasma is established to remove the residue. After the RF power is removed, the wafers, still in the batch type plasma chamber, are baked either with no oxygen flow or with a low oxygen flow rate. The baking drives off chlorine and other ions which can cause metal corrosion. The wafers are then removed from the batch type plasma chamber and normal processing continues.
Wooton et al. U.S. Pat. No. 5,496,438 for a “Method of Removing Photo Resist” describes a method for stripping patterned photoresist layer contaminated with absorbed corrosive, etchant chlorine gas from a chlorine gas plasma used to etch a metal layer protected by the photoresist. The problem is to removed the contaminated photoresist from the patterned metal layer without staining the patterned metal layer. The patterned photoresist layer is stripped by an ashing process within an oxygen gas plasma for a period of time and at a sufficiently high temperature such that substantially all of the residual corrosive gas absorbed within the patterned photoresist layer is removed, but the temperature employed is below a temperature at which the patterned metal layer begins to flow. The ashing process is performed at a temperature from at least 270° C. or preferably from at least 300° C. for a minimum time of two or three minutes.
Nishina et al., in U.S. Pat. No. 5,503,964, for a “Resist Removing Method” describes a method in which an ultraviolet radiation hardening treatment is applied to a patterned photoresist (novolak) layer prior to employing the ultraviolet radiation hardened patterned photoresist layer as a mask for an ion implantation step of implanting ions into a silicon substrate. After the ion implantation step, the mask layer is exposed to an ashing step in which an oxygen containing plasma is excited by microwaves at a temperature of 100° C. to 200° C. and a pressure under 2 Torr to 5 Torr to strip away the photoresist layer by decomposing it into carbon dioxide. The initial ultraviolet radiation hardening step reduces the problems of removing photoresist damaged by the ion implantation step and makes it possible to avoid the use of hydrogen gas and high frequency fields during the ashing operation.
Kishimura U.S. Pat. No. 5,591,654, for a “Method of Manufacturing a Semiconductor Device an a Resist Composition Used Therein” describes depositing and prebaking a blanket photoresist layer formed on a substrate at 80° C. for 90 sec. The prebaked photoresist layer is exposed to a pattern from a reticle in a stepper after which the exposed photoresist is subjected to thermal baking at 120° C. for 90 sec. Next, exposed and post baked photoresist layer is developed, rinsed and baked once again at 110° C. for 120 sec. to form a mask. The substrate is subjected to ion implantation through the thrice baked mask. Then the work is subjected to a fourth baking step followed by removal of the remaining photoresist by ashing in an oxygen plasma.